.PHONY: prepare comp run dvecov clean reg_run

#######################################
#		User Variables
#######################################
TB = ahbl2apb_tb
SEED = 1
VERB = UVM_LOW
TESTNAME ?= ahbl_mst_single_read32_apb_slv_ready 
REGRESSION_LIST = ahbl_mst_tight_transfer ahbl_mst_burst_apb_slv_err ahbl_mst_single_write16_h0000_slv_ready

GUI ?= 0
COV ?= 0
DOTCL ?= 1
OUT = out

FILES = ../../rtl/cmsdk_ahb_to_apb.v \
		../vip_lib/apb_v3/apb_pkg.sv \
		../vip_lib/apb_v3/apb_interface.sv \
		../vip_lib/ahbl/ahbl_pkg.sv \
		../vip_lib/ahbl/ahbl_interface.sv \
		../env/ahbl2apb_pkg.sv \
		../tb/ahbl2apb_interface.sv \
		../tb/ahbl2apb_tb.sv 

#######################################
#		Options
#######################################
CM_DIR ?= $(OUT)/cov/cov.vdb
CM_NAME ?= $(TESTNAME)_$(SEED)
COV_OPTS = -full64 -dir $(CM_DIR)
SIM_TCL = sim_run.tcl
VCOMP_INC = +incdir+../../rtl \
			+incdir+../vip_lib/apb_v3/{.,sequence_lib} \
			+incdir+../vip_lib/ahbl/{.,sequence_lib} \
			+incdir+../{cfg,cov,reg,env,seq_lib,seq_lib/elem_seqs,tb,test}
COMP = vcs -lca -full64 -sverilog -assert enable_diag -ntb_opts uvm-1.2 -timescale=1ns/1ps -debug_acc+all +lint=TFIPC-L $(VCOMP_INC) -l $(OUT)/log/comp.log
RUN = $(OUT)/obj/$(TB).simv -sml +UVM_TESTNAME=$(TESTNAME) +UVM_VERBOSITY=$(VERB) +ntb_random_seed=$(SEED) -cm_dir $(CM_DIR) -cm_name $(CM_NAME) -l $(OUT)/log/run.log

ifeq ($(GUI), 1)
RUN += -gui
endif
ifeq ($(DOTCL), 1)
RUN += -ucli -do $(SIM_TCL)
endif
ifeq ($(COV), 1)
COMP += -cm line+cond+fsm+tgl+branch+assert -cm_dir $(CM_DIR)
RUN += -cm line+cond+fsm+tgl+branch+assert -covg_cont_on_error
endif

########################################
#		Target
########################################
prepare:
	mkdir -p $(OUT)/log
	mkdir -p $(OUT)/cov
	mkdir -p $(OUT)/obj

comp: prepare
	$(COMP) $(FILES) -top $(TB) -o $(OUT)/obj/$(TB).simv

run:
	$(RUN) 

dvecov:
	dve $(COV_OPTS)

clean:
	rm -rf $(OUT) *simv* csrc *.h *.key *.log* *.vpd DVEfiles stack.* urgReport

reg_run:
	for ii in $(REGRESSION_LIST); do \
		$(OUT)/obj/$(TB).simv -sml +UVM_TESTNAME=$$ii +UVM_VERBOSITY=$(VERB) +ntb_random_seed=$(SEED) -cm line+cond+fsm+tgl+branch+assert -covg_cont_on_error -cm_dir $(CM_DIR) -cm_name $$ii.$(SEED) -l $$ii.$(SEED).log; \
	done
